📖 Zhihao Xu is a Ph.D. candidate of Computer Science in Southeast University(SEU) and Monash University(Monash). His supervisors are Prof. Bixin Li and Dr. Xiaoning Du. Before joining SEU and Monash, he received his Master degree of Computer Science in Dalian Maritime University(DLMU) co-supervised by Prof.Shikai Guo and Prof He Jiang.

🔍 My research includes Software Engineering(SE), Electronic Design Automation(EDA) and Open-Source System Instruction Set Architecture(RISC-V). I hope to explore how to use AI technology to improve the efficiency and accuracy of software testing, especially in embedded systems with limited hardware resources.

🔥 News

2026.05: 🎉🎉 Our paper has been accepted by ICSME’26! Congratulations to Yuxiao!
2026.04: 🎉🎉 Our paper has been accepted by TCAD!
2026.02: 🎉🎉 Two paper has been accepted by DAC! Congratulations to Jiaxin!
2025.11: 🎉🎉 Our paper has been accepted by TCAD! Many thanks to my supervisor Prof. Li and Dr. Du
2025.05: 🎉🎉 I get CSC to support my Ph.D. Study in Australia!
2025.04: 🎉🎉 Our paper has been accepted by TCAD!
2024.11: 🎉🎉 Our paper has been accepted by TODAES!

📝 Publications

Conference

FSE’22 Detecting Simulink compiler bugs via controllable zombie blocks mutation

Shikai Guo, He Jiang (*), Zhihao Xu, Xiaochen Li, Zhilei Ren, Zide Zhou, Rong Chen.

The 30th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, Singapore, April 2022.(CCF-A)

📄[paper] 💻[code]
DAC’26 RL4HDL: Code Diversity Guided FPGA Logic Synthesis Compiler Testing Via Reinforcement Learning

Zhihao Xu, Hui Zeng, Qian Ma, Hui Li, Furui Zhan, Shikai Guo (*).

The 63rd ACM/IEEE Chips to Systems Conference, July 2026. (CCF-A)

📄[paper]
DAC’26 Are They All Safe? Practical Fault Injection Attacks on FPGA Logic Synthesis Tools

Jiaxin Li, Shikai Guo*, Zhihao Xu*, Qian Ma, Xiaochen Li, He Jiang.

The 63rd ACM/IEEE Chips to Systems Conference, July 2026. (CCF-A)

📄[paper]
ICSME’26 Detecting Error Diagnostic Defects in C Compiler via Invalid Program Mutations

Yuxiao Peng, Bixin Li*, Zhihao Xu*, Lulu Wang, Li Liao, Ying Zhou .

The 42nd IEEE International Conference on Software Maintenance and Evolution, Sep 2026. (CCF-B)

📄[paper]

Journal

TODAES’25 SIMTAM: Generation Diversity Test Programs for FPGA Simulation Tools Testing Via Timing Area Mutation

Zhihao Xu, Shikai Guo, Xiaochen Li, Zun Wang, He Jiang.

In ACM Transactions on Design Automation of Electronic Systems, 2025. (CCF-B, JCR Q1)

📄[paper] 💻[code]
TCAD’25 A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers

Zhihao Xu, Shikai Guo, Guilin Zhao, Xiaochen Li, Peiyu Zou, He Jiang.

In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025. (CCF-A, JCR Q1)

📄[paper] 💻[code]
SPE’23 Feature transfer learning by reinforcement learning for detecting software defect

Shikai Guo, Jiahui Wang, Zhihao Xu, Lin Huang, Hui Li, Rong Chen.

In Software: Practice and Experience, 2025. (CCF-B, JCR Q2)
TCAD’25 TRAGIC: Test Oracle Generation for ISA Compliance Testing via Large Language Model

Zhihao Xu, Bixin Li, Xiaoning Du, Lulu Wang, Li Liao, Ying Zhou.

In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025. (CCF-A, JCR Q1)
TCAD’26 Structural Mutation Based Differential Testing for FPGA Logic Synthesis Compilers

Zhihao Xu, Shikai Guo, Guilin Zhao, Siwen Wang, Qian Ma, Hui Li, Furui Zhan

In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025. (CCF-A, JCR Q1)

Under Review

TRETS’25 Rethinking LLM-aided RTL Code Optimization Via Timing Logic Metamorphosis

Zhihao Xu, Bixin Li, Ran Yan, Lulu Wang.

Manuscript submitted to ACM Transactions on Reconfigurable Technology and Systems, 2025. (CCF-B, JCR Q2)
ISSTA’25 Generating Syntax Valid Verilog Programs with Large Language Model to Find Bugs in Logic Synthesis Tools

Shikai Guo, Wen Zhao, Zhihao Xu, Xiaochen Li, He Jiang.

Manuscript submitted to The 35th ACM SIGSOFT International Symposium on Software Testing and Analysis, 2026. (CCF-A, JCR Q1)
TACO’26 Differential Fuzz to Test Instruction Set Simulator Tools

Xinlong Zhang, Shikai Guo*, Zihan Liang, Zhihao Xu*, Xiaochen Li, He Jiang.

Manuscript submitted to ACM Transactions on Architecture and Code Optimization, 2026. (CCF-A)

🎖 Honors and Awards

2022.10 COSCO SHIPPING Second Prize Scholarship in DLMU.
2024.09 First-class academic scholarship in SEU.
2025.05 Chinese Scholarship Council full award in Monash.

📖 Educations

2024.09 - Now, Ph.D candidate, Southeast Uinversity, Nanjing.
2021.09 - 2024.06, Postgraduate, Dalian Maritime University, Dalian.

🧱 Utility Model Patents

S. Guo, Z. Xu, X. Li, and H. Jiang, “Simulation software testing method based on sleep zone mutation,” Utility Model Patent CN202310123179.9, Authorized, Feb. 20, 2025.
H. Li, X. Qi, Z. Xu, S. Guo, X. Li, and H. Jiang, “A method to improve jt defect prediction performance,” Utility Model Patent CN202310112490.3, Authorized, Jan. 10, 2025.
S. Guo and Z. Xu, “Simulation software testing method based on code generation,” Utility Model Patent CN202210946320.0, Substantive review completed, Nov. 3, 2022.
S. Guo, Z. Xu, X. Shang, H. Li, and R. Chen, “A simulink detection method based on controllable base mutations,” Utility Model Patent CN202210348499.X, Substantive review completed, Sep. 15, 2022.
S. Guo, Z. Xu, X. Shang, H. Li, and R. Chen, “Simulation software testing method based on hibernation zone mutation,” Utility Model Patent CN202210983410.7, Granted on Oct.~15, 2024.

🥇 Internships

2019 Yantai Science and Technology Project, Host
2022 National Natural Science Foundation of China (No. 62472062), Participant
2023 Dalian Excellent Young Project (No. 2022RY35), Participant
2024 Fundamental Research Funds for the Central Universities (No. 3132024257), Participant